1. Field of the Invention
The present invention relates to a data driven type information processing apparatus. More specifically, the present invention relates to a data driven type information processing apparatus in which successive copies of a packet flowing through a circulating pipeline is performed reasonably and efficiently.
2. Description of the Background Art
When processing of a large amount of data at high speed is necessary, parallel processing is effective. Among architectures suitable for parallel processing, data driven type architecture has been attracting attention. According to the data driven type processing system, process proceeds in accordance with the rule that “when input data necessary for executing a certain process are all prepared and resources including an arithmetic processor necessary for that process are allocated, the process is executed.”
FIG. 10 is a block diagram of a conventional data driven type processing system, and FIG. 11 is a specific block diagram of the data driven type information processing apparatus shown in FIG. 10. FIGS. 12A to 12C represent packet field configurations, in which FIG. 12A represents a basic configuration of PA_IO of the data driven type information processing apparatus, FIG. 12B represents a packet PA13 RT flowing through an IO (input/output)/route control unit 10, a firing control unit 11 and a program storing unit 14 in the data driven type information processing apparatus 1, and FIG. 12C represents a configuration of a packet PA_FC flowing through a history processing unit 12 and an operation processing unit 13 in the data driven type information processing apparatus 1.
The packet PA_IO of FIG. 12A includes a field 20 storing a PE number (Processing Element Number: processor number) PE, a field 22 storing a node number ND, a field 23 storing color CL, and a field 24 storing data D. The packet PA_RT of FIG. 12B includes fields 22 to 24 that are similar to those of FIG. 12A, and a field 21 storing an instruction code OP. The packet PA_FC of FIG. 12C includes fields 21 to 23 similar to those of FIG. 12B, a field 25 storing left data LD and a field 26 storing right data RD.
Referring to FIG. 10, the data driven type processing system includes the data driven type information processing apparatus 1, and an external data memory 2 storing a plurality of data. Data driven type information processing apparatus 1 includes input ports IA, IB connected to data transmission paths 3 and 4, respectively, output ports OA, OB connected to data transmission paths 5 and 6, respectively, and a memory port TM connected to an access control line 7.
To data driven type information processing apparatus 1, the packet PA_IO shown in FIG. 12A is time-sequentially input from data transmission path 3 or 4 through input port IA or IB. Data driven type information processing apparatus 1 has prescribed processing contents pre-stored as a program, and a process based on the program contents is executed. When there is an access from memory port TM of data driven type information processing apparatus 1, that is, when a request signal for referencing/updating contents of external data memory 2 is received through access control line 7, external data memory 2 makes an access in accordance with the received access request, and responds to the data driven type information processing apparatus 1 by providing a result.
Data driven type information processing apparatus 1 processes the input packet PA_IO, and after the end of processing, outputs packet PA_IO through output port OA and data transmission path 5, or through output port OB and data transmission path 6.
Data driven type information processing apparatus 1 shown in FIG. 10 includes, referring to FIG. 11, an IO/route control unit 10, a firing control unit 11, a history processing unit 12, an operation processing unit 13 and a program storing unit 14. Firing control unit 11 includes a constant memory 17 and a wait memory 18 necessary for the data driven type processing. An internal memory 15 and an external memory interface 16 are connected to history processing unit 12. Program storing unit 14 includes a program memory, which is also necessary for the data driven type processing.
Referring to FIGS. 12A to 12C, processor number PE represents information for identifying data driven type information processing apparatus 1 at which the corresponding packet PA_IO is to be processed, in a system having a plurality of data driven type information processing apparatuses 1 connected thereto. Node number ND is used as an address for accessing to the contents of constant memory 17 and program memory 19. Color CL is used as an identifier for uniquely identifying a packet time-sequentially input to data driven type information processing apparatus 1, and used for memory address calculation in history processing unit 12.
The operation of the system shown in FIGS. 10 and 11 will be described in the following. When the packet PA_IO shown in FIG. 12A is applied to data driven type information processing apparatus 1 designated by processor number PE through data transmission path 3 or 4, the packet PA_RT of FIG. 12B is output at IO/route control unit 10. Specifically, IO/route control unit 10 discards the field of processor number PE of the input packet PA_IO, based on the node number ND of the input packet PA_IO, obtains the instruction code OP and the next new node number ND which are stored in fields 21 and 22 of PA_RT of FIG. 12B, and transmits the packet PA_RT to firing control unit 11.
Therefore, the packet PA_RT applied from IO/route control unit 10 to firing control unit 11 has such a configuration as shown in FIG. 12B. In IO/route control unit 10, color CL and data D are unchanged.
In firing control unit 11, constant data or packet PA_RT to be paired is detected. Detection of the next packet PA_RT is referred to as “firing”. Firing control unit 11 waits for the packet PA_RT applied from IO/route control unit 10 as needed, utilizing wait memory 18. As a result, when there are two packets PA_RT having both node number ND and color CL corresponding to each other, that is, when there are two packets PA_RT forming a pair, data D in field 24 of one packet PA_RT is stored in the field number 25 of packet PA_FC shown in FIG. 12C, the data D in field 24 of the other packet PA_RT is stored in field 26 of packet PA_FC, and the packet PA_FC is transmitted to history processing unit 12.
At this time, one packet PA_RT is erased. Here, when the data to be operated is not the packet PA_RT but constant data, waiting at firing control unit 11 does not take place, the constant data is read from constant memory 17 and stored in either the field 25 or 26 of packet PA_FC, the data D of the packet PA_RT is stored in the other of the fields 25 and 26 of packet PA_FC, and the packet PA_FC is transmitted to history processing unit 12. Therefore, packet PA_FC applied from firing control unit 1 to history processing unit 12 has the configuration shown in FIG. 12C. In firing unit 11, instruction code OP, node number ND and color CL are unchanged.
History processing unit 12 decodes the instruction code OP of packet PA_FC applied from firing control unit 11, and performs a prescribed process based on the result of decoding. When instruction code OP indicates an instruction to access internal memory, the internal memory 15 is accessed, and the packet PA_FC storing the result of accessing in field 25 or 26 is transmitted to operation processing unit 13.
When instruction code OP indicates an instruction to access external data memory, an access request packet is sent to external memory interface 16. In accordance with the contents of the received access request packet, external memory interface 16 accesses the external data memory 2 from TM port through memory access control line 7, receives the result of accessing and transmits a packet to history processing unit 12. As a result, the result of accessing to the external data memory is stored in field 25 or 26 of packet PA_FC representing the instruction to access external data memory, and the packet PA_FC is transmitted to operation processing unit 13. When instruction code OP indicates an instruction not related to the history processing unit 12, operation to each field of packet PA_FC is not performed, and packet PA_FC is transmitted as it is to operation processing unit 13.
Operation processing unit 13 decodes the instruction code OP of packet PA_FC applied from history processing unit 12, and performs a prescribed processing in accordance with the result of decoding. When instruction code OP indicates an instruction to operate the contents of packet PA_FC, a prescribed operation process is performed on the contents (mainly, left data LD and write data RF) of packet PA_FC in accordance with the instruction code OP, the result is stored in the field (mainly, data D of field 24) of the packet PA_RT of FIG. 12B, and packet PA_RT is transmitted to program storing unit 14. Instruction code OP, node number ND and color CL are basically unchanged.
Program storing unit 14 has a program memory 19 storing a data flow program including a plurality of next order instruction codes OP and node numbers ND. Program storing unit 14 receives the packet PA_RT from operation processing unit 13, reads the node number ND of the next order and the instruction code OP of the next order from program memory 19 in accordance with address designation based on the node number ND of the input packet PA_RT, stores the read node number and instruction code OP in areas 22 and 21 of the input packet PA RT, and transmits the packet PA_RT to IO/route control unit 10. The color CL and data D are unchanged.
The IO/route control unit 10 decodes the instruction code OP and the node number ND of the applied packet PA_RT, and determines whether the next order instruction is to be executed in the data driven type information processing apparatus 1 or by an external data driven type information processing apparatus. When it is determined that the instruction should be executed by an external data driven type information processing apparatus, the processor number of the data driven type information processing apparatus of interest is stored in field 20 of packet PA_IO of FIG. 12A, and packet PA_IO is output to OA port or OB port. When it is determined that the instruction should be executed by the data driven type information processing apparatus 1 itself, packet PA_RT is again transmitted to firing control unit 11 as it is.
In this manner, as the packets PA_RT and PA_FC circulate the data driven type information processing apparatus, a process in accordance with the data flow program pre-stored in program memory 19 proceeds.
In data driven type information processing apparatus 1, packets are transferred in non-synchronous manner by handshake. The process in accordance with the data flow program stored in program memory 19 is executed in parallel, by pipeline processing, as the packets circulate in the data driven type information processing apparatus 1. Thus, in the data driven type processing system, performance of parallel processing by the unit of packet is very high, and flow rate of the packets circulating in the apparatus is one important measure representing the performance of processing.
Recently, the feature of such data driven type information processing apparatus is applied to network protocol processing that requires high speed operation processing of a large amount of data and high speed transfer.
A general network protocol will be described. First, the data transfer and data processing unit in the network protocol processing is referred to as a frame. The data in a frame is mainly classified into a header and a data body. The header represents an area storing information related to the attribute of the data body, including information of the destination and source of the frame, length of the data body and the type of protocol. The data body represents the data itself that is to be actually transmitted. When the size of the information represented by the header is compared with the size of the data body, the ratio of the header occupying the frame is very small, and most of the frame is occupied by the data body.
In the network protocol processing, operation on the data value itself is rare, while in most cases, the manner of handling the data body or output destination of the frame is controlled by analyzing in detail the header portion. Therefore, generally, upon receiving a frame of a large capacity, the processing apparatus first stores the received frame as a whole temporarily in a memory within the processing apparatus, takes out the header portion therefrom, and executes a prescribed protocol processing within the processing apparatus. Here, the memory in the processing apparatus corresponds to the external data memory 2 of the data driven type information processing apparatus 1.
The processing apparatus for a network protocol is required of executing the above described frame operation at high speed with high efficiency. For this purpose, it is necessary after the completion of header processing, to take out the frame as a whole from the memory, and transmit the frame to the outside of the processing apparatus, by an output method in accordance with the result of processing. Specifically, in data driven type information processing apparatus, using one packet (PA_RT of FIG. 12B) indicating completion of header processing as a trigger, it is necessary to read the frame stored in the external data memory 2 at high speed with high efficiency. In a data driven type information processing apparatus, basically, only a memory data of 1 word can be read from one trigger packet PA_RT.
Therefore, in a data driven type information processing apparatus, a function of high speed memory burst reading and a function of packet successive copying become necessary. It is noted, however, that temporary and abrupt increase in packet number associated with burst reading from a memory of a certain frame or associated with successive copying of packets must not affect the flow of the packet related to header processing of other frames, causing degradation in header processing performance. Further, the data length of a frame is at fixed, as represented by the header. Thus, the number of memory burst reading and the number of successive copying of the packets should not be fixed by the program but must be dynamically changed, in accordance with the contents of the trigger packet PA_RT. Further, when a frame is read from the memory and the frame is transmitted to the outside of the processing apparatus, it is desired that a receiving device outside the processing apparatus easily identifies a terminating end of the frame.
In a conventional data driven type information processing apparatus, when data of a large capacity is to be read from the external data memory 2 using one trigger packet PA_RT, the packet PA_RT is successively and repeatedly copied by a software, that is, copied one by one by the program storing unit 14 of FIG. 11, and memory access is performed using each of the copied plurality of packets PA_RT as a base. Here, in order to copy one trigger packet PA_RT, the time corresponding to one circulation through the circulating pipeline of the data driven type information processing apparatus 1 shown in FIG. 11 is necessary. Therefore, a long time is necessary for reading the entire frame, and hence this approach is not practical.
In another approach, a burst reading or a packet copy function is provided by a hardware at the history processing unit 12 or the operation processing unit 13 shown in FIG. 11. In this approach, however, the processing unit performs autonomous and non-synchronous packet copying, and therefore, the number of packets increases temporarily and abruptly at a pipeline ahead of the processing unit. This is a bottleneck that affects the packets at the downstream of the processing unit, that is, affects the packet flow not related to the burst reading or packet copying, causing packet convergence or stall of the processor within the data driven type information processing apparatus.
In order to prevent packet convergence and process stall described above, provision of a hardware to realize the function of monitoring packet convergence contents in the processing apparatus or to implement a packet counter has been proposed. This approach, however, also presents a problem that it acquires hardware cost.